Guide to Computer Processor Architecture : A Risc-v Approach, With High-level...

Description: Guide to Computer Processor Architecture : A Risc-v Approach, With High-level Synthesis, Paperback by Goossens, Bernard, ISBN 3031180224, ISBN-13 9783031180224, Like New Used, Free shipping in the US Th presents a succession of RISC-V processor implementations in increasing difficulty (non pipelined, pipelined, deeply pipelined, multithreaded, multicore). Each implementation is shown as an HLS (High Level Synthesis) code in C++ which can really be synthesized and tested on an FPGA based development board (such a board can be freely obtained from the Xilinx University Program targeting the university professors). Th can be useful for three reasons. First, it is a novel way to introduce computer architecture. The codes given can serve as labs for a processor architecture course. Second, th content is based on the RISC-V Instruction Set Architecture, which is an open-source machine language promised to become the machine language to be taught, replacing DLX and MIPS. Third, all the designs are implemented through the High Level Synthesis, a tool which is able to translate a C program into an IP (Intellectual Property). Hence, th can serve to engineers willing to implement processors on FPGA and to researchers willing to develop RISC-V based hardware simulators.

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Location: Jessup, Maryland

End Time: 2024-10-03T21:47:31.000Z

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